STMicroelectronics STM32F103 ARM Cortex-M3 Demo
[RTOS Ports]

Note: If this project fails to build then it is likely the version of IAR Embedded Workbench being used is too old. If this is the case, then it is also likely that the project file has been (silently) corrupted and will need to be restored to its original state before it can be built even with an updated IAR version.

IMPORTANT! Notes on using the STM32 ARM Cortex-M3 Demo

1. Source Code Organisation
2. The Demo Application
3. RTOS Configuration and Usage Details

Source Code Organisation

The IAR workspace file for the STM32F103 demo is called RTOSDemo.eww and is located in the FreeRTOS/Demo/CORTEX_STM32F103_IAR directory.

The Demo Application

Demo application hardware setup

The demo application uses the LEDs and display built onto the prototyping board so no other hardware setup is required.

A J-Link USB JTAG interface is used to interface the host PC with the target.

Building and running the demo application

1. Open the FreeRTOS/Demo/CORTEX_STM32F103_IAR/RTOSDemo.eww project from within the Embedded Workbench IDE.

2. Select 'Rebuild All' from the IDE 'Project' menu. The project should build with no errors or warnings.

3. Select 'Debug' from the IDE 'Project' menu. The microcontroller flash memory will be programmed with the newly built binary and the debugger will break on the entry to main().

Functionality

The following tasks and tests are created in addition to the standard demo tasks:

• High priority interrupt test

  A high frequency periodic interrupt is generated using a free running timer to demonstrate the use of the 'configKERNEL_INTERRUPT_PRIORITY' configuration constant. The interrupt service routine measures the number of processor clocks that occur between each interrupt - and in so doing measures the jitter in the interrupt timing. The maximum measured jitter time is latched in the ulMaxJitter variable, and displayed on the LCD display by the 'Check' task as described below. The fast interrupt is configured and handled in the timertest.c source file. This demonstrates how the RTOS kernel can be configured so as to have no impact on higher priority interrupt processing.

  The ARM Cortex-M3 core has the ability to hasten the entry into an interrupt service routine (and therefore reduce latency) by up to 8 cycles should a high priority interrupt occur while a lower priority interrupt is already being serviced. The measured jitter time should therefore be no more than 8 clock cycles.

• LCD task

  The LCD task is a 'gatekeeper' task. It is the only task that is permitted to access the display directly. Other tasks wishing to write a message to the LCD send the message on a queue to the LCD task instead of accessing the LCD themselves. The LCD task just blocks on the queue waiting for messages - waking and displaying the messages as they arrive.

• Check task

  This only executes every five seconds but has the highest priority so is guaranteed to get processor time. Its main function is to check that all the standard demo tasks are still operational. Should any unexpected behaviour within a demo task be discovered the 'check' task will write an error to the LCD (via the LCD task) (this mechanism can be tested by removing the loopback connector on UART0, and in so doing deliberately generating an error). If all the demo tasks are executing with their expected behaviour then the check task writes PASS along with the max jitter time to the LCD (again via the LCD task), as described above.

When executing correctly the demo application will behave as follows:

• LEDs LED1, LED2 and LED3 are under control of the 'flash' tasks. Each will flash at a constant frequency, with LED1 being the fastest and LED3 being the slowest.

• LED4 is under controlled by the standard ComTest Tx task. LED4 will toggle each time the ComTest Tx task transmits a character over the RS232 port.

• The 'check' task will write "PASS" and the jitter time in nanoseconds to the display every 5 seconds.

RTOS Configuration and Usage Details

RTOS port specific configuration

• configTICK_RATE_HZ

  This sets the frequency of the RTOS tick. The supplied value of 1000Hz is useful for testing the RTOS kernel functionality but is faster than most applications require. Lowering this value will improve efficiency.

• configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY

  See the RTOS kernel configuration documentation for full information on these configuration constants.

Attention please!: Remember that ARM Cortex-M3 cores use numerically low priority numbers to represent HIGH priority interrupts, which can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this can result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY.

The lowest priority on a ARM Cortex-M3 core is in fact 255 - however different ARM Cortex-M3 vendors implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. For example, on the STM32 the lowest priority you can specify in an ST driver library call is in fact 15 - and the highest priority you can specify is 0. This is defined by the constant configLIBRARY_KERNEL_INTERRUPT_PRIORITY in FreeRTOSConfig.h.

Each port #defines 'BaseType_t' to equal the most efficient data type for that processor. This port defines BaseType_t to be of type long.

Note that vPortEndScheduler() has not been implemented.

Interrupt service routines

Note that portEND_SWITCHING_ISR() will leave interrupts enabled.

Switching between the pre-emptive and co-operative RTOS kernels

Compiler options

Memory allocation